Hi Folks,
While reading one of Les's replies, it occurred to me that I don't actually know how regen is implemented in silicon. I imagine it is similar to a 3-phase diode bridge tied to the motor windings with a FET switch to on/off control the current flow.
Can anyone share a schematic of an actual circuit?
I also think I now understand why regen starts with a big pulse on my MP3. Before my supposed FET is turned on, winding voltage is quite high; the instant the FET turns on, the voltage difference from winding to battery is then quite high, so the current pulse is quite high. Once the current spike is gone, the voltage difference becomes small, effectively determined by the impedance of the battery to the steady state charging current generated by the windings.
So am I just being naive , or is this close to right?
If close, could the regen current be stored in an ultra capacitor rather than the battery? Pulse current from a cap can be much larger than a battery....
TTFN,
Dennis
